Student CMOS Fabrication Process
This node shows the BPFL code for the student CMOS fabrication process
used in EECS 143, which contains approximately 41 steps. (Many steps
are omitted.)
-----------------------------
defflow Student-CMOS (mask-set, lot-size)
begin
/* allocate wafer */
wafer-spec := bare-silion-wafer(crystal-face: 100,
resistivity: [{18 ohm-cm} {22 ohm-cm}],
quality: 'product, dope: 'p);
allocate-lot(size: 1, snapshot: wafer-spec,
lot-name: 'test);
step START-OXIDE begin /* oxidize wafer surface */
std-dry-oxidation(thickness: {58 nm}, temperature: {900 degC});
end;
step INSULATOR begin /* deposit silicon nitride insulator */
std-nitride-deposition(thickness: {80 nm});
end;
step NWELL-LITHO begin /* spin on, expose, develop resist */
pattern(mask: 'nwell, resist-thickness: {1 um}); /* NWELL pattern */
end;
step NWELL-ETCH begin /* etch the exposed nitride */
etch-nitride(overetch: {20 %}, undercut: {50 %});
end;
. . .
step POLY begin /*put down poly layer*/
pattern(mask: 'poly);
etch-poly();
strip-resist();
end;
. . .
step RESIST-PSD begin /* strip resist left after doping polysilicon */
strip-resist();
end;
step DEPOSIT-PSG begin /* deposit polysilicon glass */
std-psg-deposition(thickness: {0.75 um});
end;
step CONTACT begin /* put down contacts */
pattern(mask: 'cont, invert: true);
etch-psg();
strip-resist();
end;
step ETCH-OXIDE begin /* remove oxide */
etch-oxide(thickness: {0.7 um}, undercut {0 %});
end;
step DEPOSIT-PSG begin /* deposit aluminum */
std-al-deposition(thickness: {0.8 um});
end;
step CONTACT begin /* deposit metal layer */
pattern(mask: 'mtl);
etch-al();
strip-resist();
end;
end;