semiconductor-course
For more information, see:
Schank, P., and Rowe, L. (1993).
The design
and assessment of a hypermedia course on semiconductor manufacturing.
Journal of Educational Multimedia and Hypermedia, 2 (3),
299-320.
An Introduction to Microelectronics Manufacturing and Markets
by
Patricia Schank
and
Lawrence Rowe,
Electrical Engineering and Computer Sciences,
University of California, Berkeley
Welcome! This hypermedia course reviews the evolution of today's
microelectronic integrated circuit (IC) chip technology, explains how
IC's are made, and describes the present-day IC markets. This course
is designed for people with little or no background in these areas.
Note: the video segments of this course are not yet available.
To begin, select one of the following topics:
- Review of IC circuit elements and evolution
- IC Manufacturing
- Stages of IC design and manufacturing
- Software systems for IC manufacturing
- The Berkeley Microfabrication Laboratory
- World-wide IC markets
- References
Click here to see a microelectronic technology evolution timeline.
Electronic devices are made of active circuit elements such
as transistors, and passive elements such as resistors and
capacitors (e.g., Meindl, 1977). Before the advent of
microelectronic technology, these basic functional units were
manufactured separately and wired together with metal conductors
to form electronic devices.
Circuit Elements
Microelectronic technology has not, for the most part, changed
the nature of these basic functional units. Rather, it has made
these electronic functions more reproducible, more reliable, and
less expensive by fabricating miniaturized versions of them on a
single semiconducting substrate of silicon or (less commonly)
gallium arsenide. As a result, a growing number of logic circuits
have been implemented using the basic circuit elements that are
most easily fabricated in silicon and perform best: transistors.
Transistors
Research into some of the mysterious electrical properties of
semiconductors led to the development of the transistor, a device
for controlling the flow of electrons in a solid crystal. Such
control was previously gained using bulky vacuum tube technology.
Transistor technology enabled the reduction of electronic devices
to a miniature scale (Rockett, 1991; Meindl, 1977).
Click here to see the microelectronic technology evolution timeline
Like a switch, a transistor can either allow or inhibit the flow of
electric current through it in response to an external signal. For
example, consider metal-oxide-silicon (MOS) field effect transistors,
commonly used in digital electronics. A MOS transistor is formed by
creating two islands of semiconducting material, doped with either
negative "N-type" or positive "P-type" charge carriers, in a substrate
of the same material doped with charge carriers of the opposite type.
A schematic drawing of an N-channel MOS transistor
(Sorry, this video on MOS transistors (3 min) is not yet available)
A layer of insulating material is bridged above these "source" and
"drain" islands, and metalic "gate" electrode is deposited on the
insulator. By alternating the voltage applied to the gate, charge
carriers from the source are either attracted toward the channel
under the gate, or repelled from it. When several charge carriers
are attracted toward the region under the gate, an induced channel
is formed that allows charge carriers to travel all the way across
the gate region and into the drain region. Another common transistor,
the bipolar transistor, is formed by sandwiching a thin layer of
P- or N-type semiconductor between two regions of the opposite type
of semiconductor. (Bate, 1988; Meindl, 1977, 1987).
Bipolar transistor circuit diagram
By connecting together several transistors, logic signals can be
sent to the next stage of a circuit. In this way, large circuits
that remember voltages (e.g., Static and Dynamic Random Access
Memories, SRAMs and DRAMs), or make complex switching decisions based
on memories and other inputs, are created (Hodges, 1977; Mayo, 1977).
Resistors
The electrical resistance of a material is a measure of how
difficult it is for electric current to flow through the atomic
structure of a material. A resistor is an electronic circuit element
with a fixed amount of resistance to current flow. Resistors are
used to create a voltage drop to meet the voltage requirements of
the electrical device through which the electric current is flowing.
Resistor diagram
A microelectronic resistor is commonly formed by creating a thin
ribbon of semiconducting material, doped with either negative
"N-type" or positive "P-type" charge carriers, in a region doped
with charge carriers of the opposite type (Meindl, 1977).
An IC resistor
Capacitors
Capacitance is a measure of the strength of the electric field
surrounding a conductor. A capacitor is a passive electronic
circuit element with the ability to store electrical charge.
Capacitors can be used to change alternating current (AC, what
comes out of electrical wall outlets) into stored direct current
(DC, like in a battery). This stored electrical energy can then
be used to drive the operation of electrical devices.
Capacitor diagram
Capacitance, or stored electrical charge, is increased when large
areas of conductors bearing opposite electrical charges are brought
close together. Discrete capacitors are often made of metal plates
separated by a thin insulating layer.
In a microelectronic circuit, a capacitor is commonly created by
forming a thin layer of insulator on the surface of a doped
semiconducting material, followed by a deposited layer of metal.
Only very small values of capacitance can be created this way
(Meindl, 1977).
IC capacitor
Semiconductors
A semiconductor is a material that is neither a good conductor nor a
good insulator. The semiconducting material most commonly used in IC
manufacturing is silicon, although gallium arsenide is also used
for some applications.
In conductors such as metal, electric current is carried by electrons
free to wander about the atomic lattice of the material. In
insulators, electrons normally stay tightly bound to their atoms and
are not available to serve as charge carriers. In semiconductors,
free carriers are not ordinarily present, but they can be generated
with a modest amount of energy.
Semiconductor devices (e.g., transistors), are made by introducing
controlled amounts of impurity atoms into a semiconducting crystal.
This process is called doping. For instance, when silicon is doped
with phosphorus, the phosphorus atoms displace some of the a silicon
atoms. But phosphorus has 1 more electron in it valence (or outermost
shell) than silicon does (silicon atoms have 4 electrons, phosophorus
atoms have 5), and the extra electrons brought by the phosphorus are
not committed to bonds between atoms. So, these excess electrons can
be mobilized if a small voltage is applied to the crystal. Such
semiconductor regions (with excess negative charge) are called
"N-type" regions.
Phosphorus-doped silicon lattice with excess electrons
If silicon is doped with boron atoms, which have only 3 electrons in
their valence, electron deficiencies call "holes" are left in the
crystal structure. Holes have positive electric charge and can move
through the lattice much the same way that a bubble moves through a
liquid medium. Semiconductor regions with an excess of positive
charges are called "P-type" regions (Meindl, 1977, 1987).
The Virtues of Silicon
Several properties of silicon (Si) explain its dominance as a
substrate base in the fabrication of integrated circuits. Material
limits of silicon have resulted in the (less common) use of another
semiconductor, gallium arsenide.
Silicon has a large bandgap, which is the difference in energy, or
gap, between the valence and conduction electrons. As a result,
silicon is relatively insensitive to temperature increases that can
boost valence electrons into the conduction band and interfere with
the precise control of the electrical properties required in a
device. What's more, silicon is an abundant element that can be
formed into almost perfect crystals at a relatively low cost, and
silicon's native oxide, silicon dioxide (SiO2), is an excellent
insulator with desirable attributes for IC's (Meindl 1977, 1987).
Gallium Arsenide (Brodsky, 1990; Meindl, 1987)
Gallium arsenide (GaAs) does not occur in nature. It was synthesized
in the 1950's and is used as a semiconducting substrate in a few
IC chips. Gallium arsenide's virtue is speed: conduction-band
electrons in gallium arsenide drift faster than they do in silicon--
by some measures, about 2.5 times faster.
Compared to silicon, however, gallium arsenide has some
disadvantages. It is less abundant than silicon, and does not
grow an excellent insulating native oxide as does silicon.
And as transistors become smaller, gallium arsenide's speed
advantage is offset by other material factors. A transistor can
be made to switch faster by applying more power to it, but this
additional power also increases heat buildup in the device. For
very small devices, switching speed is limited by the capacity
of the substrate to conduct heat away from the device. Since
silicon has three times the thermal conductivity of gallium
arsenide (that is, it can conduct heat away more quickly), small
silicon devices may actually be able to switch just as fast as
gallium arsenide ones, thus reducing the advantages of using
gallium arsenide as a semiconducting substrate for integrated
circuits.
Gallium arsenide devices are used for computing, television
reception, satellite reception, and the optoelectronic transmission
of data through optical-fiber networks (a technology known as
photonics). Gallium arsenide light emitting diodes and lasers
(used in visual-display systems and audio disk players) currently
account for $1 billion in annual sales.(Brodsky, 1990).
Digital Logic Circuit Technologies
Click here to review the microelectronic technology evolution timeline.
Click here for a summary of important electronic technologies
In microelectronics, the main cost of a component is measured by
the area of silicon it occupies. It's difficult, though, to
shrink passive components like resistors, capacitors, and
inductors. Although improvements in technology will lead to an
increased selection of miniaturized passive components, simple
-replacement- of passive components by active transistors has
proven to be a far more effective strategy. (Resistors, for
example, can be replaced by direct substitution.) So, over the
past two decades, research in microelectronic technology has
focused on producing miniaturized high-quality transistors. This
trend is reflected in the evolution of digital logic circuits
toward a state where transistors are now used for almost all
functions (Meindl, 1977).
The fundamental units of electronic logic are logic gates, and at
the heart of every gate is at least one active circuit element.
Discrete bipolar transistors and integrated circuits were first
produced using bipolar technologies. MOS technologies, employing
MOS transistors, were developed later than bipolar ones, and for
the most part have been built only in microelectronic form. The
evolution of bipolar and MOS technologies reflect advances in
processing technology (Meindl, 1977; McCanny & White, 1987).
Bipolar Technologies
The first families of bipolar logic circuits were constructed from
discrete components. In transistor-resistor logic (TRL), the number
of resistors was maximized since they were the cheapest devices.
In diode-transistor logic (DRL), performance was improved by
substituting semiconductor diodes for many of the resistors
(Meindl, 1977; McCanney & White, 1987).
The first microelectronic technology, resistor-transistor logic
(RTL), used mostly transistors and only a few resistors.
Transistor-transistor logic (TTL), in which transistors are
abundant and coupled directly together, remains the most popular
bipolar technology today. Integrated-injection logic (I2L)
technology reduces the packing densities of bipolar devices to a
size approaching that of MOS devices by compressing a logic
circuit made of two transistors into a single unit. Finally,
emmitter-coupled logic (ECL) devices were developed for applications
that demand extremely high speed. ECL devices consume much more
power, and are used exclusively in Cray computers. (Meindl, 1977;
McCanney & White, 1987; Oldham, 1991).
MOS Technologies
MOS (metal oxide silicon) technologies offer a reduction in the large
space and high power consumption requirements of bipolar devices.
The first MOS electronic circuits employed p-channel (PMOS) devices
because they were the easiest to make. As MOS technology advanced,
n-channel (NMOS) devices replaced PMOS devices because they offered
higher speed performance for the same density, complexity, and cost.
The need for reduced power consumption led to the development of the
larger but more power efficient complementary MOS (CMOS) devices
(Meindl, 1977; McCanney & White, 1987; Oldham, 1991).
A CMOS device
Despite the density and power efficiency advantages of MOS
technologies, high-speed bipolar technologies are still developed.
Recently emerging biCMOS technologies combine the speed advantages
of modern bipolar technology with the space and power advantages of
MOS technology (Oldham, 1991).
Click here to review the summary of important technologies
When a designer conceives of a new product, he or she specifies the
functional characteristics of the device, selects many of the process
steps required to manufacture it, and uses CAD tools to estimate the
size and location for the hundreds and thousands of circuit elements.
So that the goals of the circuit designer will be achieved, a high
degree of control over the materials, process steps, and cleanliness
of the production environment is essential during IC fabrication.
In IC manufacturing, 100's of copies of a microelectronic circuit are
simultaneously fabricated on a thin semiconducting substrate--commonly
made of silicon--called a wafer. Silicon wafers are typically made
by slicing 3 to 8 inch diameter slices, .002 to .004 inch thick, from
a purified silicon cylinder. Silicon cylinders are grown by placing a
single-crystal seed in a vat of molten silicon and slowly withdrawing it.
Mass production of IC's is completed in several stages, in which
wafers--grouped together in lots of 20-100 wafers--are processed
together and converted into the same final product. This process
can be summarized in four process stages: wafer fabrication, wafer
probe and sort, chip assembly, and final chip test and burn-in.
IC manufacturing process stages
Three important measures of manufacturing efficiency are yield, cycle
time and fabrication cost. The costs of the last two stages, chip
assembly and final testing, are often higher than wafer fabrication
and testing because manufacturing costs are not shared among many die.
(A die, or chip, is an individual microelectronic circuit.) Each die
must be separately packaged and tested. (Oldham, 1977; Elliot, 1989;
Harrison et al, 1989; Chen et al, 1987).
Stage 1: Wafer Fabrication
During wafer fabrication, various layers of substances are formed
within the wafer, or deposited on the surface of it in accordance
with the plan of the circuit designer. These layers are typically
formed in the following way:
A thin film of oxide is formed or (less commonly) deposited on the
surface of the wafer in a process called oxidation.
Then, a photoengraving process called photolithography (also known as
"masking" or "imaging") is used to transfer a desired pattern onto the
surface of a silicon wafer. Portions of the oxide surface under the
pattern are then dissolved away in a process called etching.
Finally, in a process called doping, impurities are introduced into the
exposed surface to form device elements such as the source and drain
of a transistor. Thin films may also be deposited on the wafer to
form elements such as the polysilicon gate of a transistor.
Basic stages of IC manufacturing
(This video on basic fabrication equipment and methods (14 min) is
not yet available)
These procedures are repeated many times until a complete circuit is
is constructed. To fabricate circuits, several users of the
Berkeley Microfabrication Lab formally specify these steps using
the Berkeley Process Flow Language (BPFL).
Example of BPFL code: Student CMOS fabrication process
Oxidation
When silicon is exposed to oxygen or water vapor at elevated
temperatures (between approximately 900 and 1000 degrees celcius),
the silicon reacts with the oxygen to form a continuous layer of
silicon dioxide. In this process (called thermal or wet oxidation)
part of the silicon substrate is consumed to form a little under 50%
of the final oxide thickness.
This oxide layer can be used as a mask during dopant diffusion, as a
junction passivator, as an insulating field oxide, or as a gate
dielectric in MOS transistors (Maly, 1987).
Example oxidation process flow
A photograph of wafers exiting an oxide furnace
Review the student CMOS example:
oxidize wafer surface
Photolithography (Oldham 1977, 1991; Maly 1987)
The photolithographic process was inspired by the physical lithographic
engraving process--or contact printing--used in printing businesses to
transfer desired patterns onto surfaces. In IC manufacturing, optical
photolithography, or (less commonly) electron-beam or X-ray lithography,
are used to define patterns, layer by layer, on a wafer. Once a layer is
defined, it can be etched into the underlying (usually oxide) surface
to create elements of devices. Using optical techniques, 0.75 micrometer
chip geometries are common (compared to 7 micrometer geometries in 1970),
allowing thousands of gates to fit onto a single chip.
The electronic technology evolution timeline
is available
here
Basic stages of photolithography
First, the entire (usually oxide-covered) surface of a wafer is covered
with a thin film of photoresist, a light-sensitive polymer that changes
its solubility in a developing solution when exposed to UV light. The
film is spread by placing a drop of the resist on the wafer and rapidly
spinning it. The wafer is then baked to dry the film and cause it to
adhere more strongly to the wafer.
Covering a wafer with resist
The resist-covered surface of the wafer is exposed to UV light through a
photomask, in which clear and opaque areas represent the pattern to be
transferred. The mask prevents the UV light from passing through the
opaque regions while allowing radiation to pass through the clear
regions, which changes the solubility of the underlying photoresist.
The resist is then developed by washing the wafer in a solvent that
removes the film wherever the mask was clear (if a "positive"
photoresist is used) or opaque (if a "negative photoresist is used).
Positive photoresists generally require longer exposure than negative
photoresists, but they provide better photolithographic resolution.
After developing, the wafer is baked to harden the remaining photoresist.
(This video on photolithography demonstration (3 min) is not yet
available
Review the student CMOS example:
deposit insulator
Electron Beam and X-ray Lithography
In X-ray lithography, X-rays instead of UV (optical) rays are used to
expose the photoresist. X-ray radiation has a shorter wavelength
than UV radiation, and was developed as a technique to allow for
additional reduction of the minimum dimensions of circuit elements.
Thus far, however, the less expensive optical lithography techniques
have been perfected so that circuit elements with minimum dimensions
approaching the size of those created using X-ray techniques (presently
near .5 micrometer) can be produced. Thus, the overwhelming advantages
of X-ray lithography have not yet been realized (Oldham, 1991).
X-ray and optical lithography are both parallel processes in which
the surface (or each die) of a photo-sensitive resist-coated wafer
is exposed to radiation through a photomask. If a circuit pattern can
be written directly onto a photomask, why not skip the mask step and
write the circuit pattern directly on the wafer? In electron-beam
(E-beam) lithography, this is exactly what is done. Using ebeams, the
circuit pattern is written directly onto an electron-sensitive resist
by serially scanning an E-beam across the wafer in the desired pattern.
Very high pattern resolution can be achieved using E-beams. This
technique is not commonly used, however, since E-beam equipment is
much more complex and expensive, available electron-sensitive resists
have poor sensitivity, and (serial) E-beam exposure takes much longer
than (parallel) optical and X-ray exposures. For example, parallel
optical exposure of a 6 inch wafer (with .75 micrometer resolution)
typically takes 60 seconds, while E-beam exposure time can take up to
an order of magnitude longer at 600 seconds (Elliott, 1986, 1989).
E-beam lithography is very expensive. Since economics drive technology
in the IC industry, e-beam lithography is thus rarely used. (E-beams
are often used to create photomasks, however, of which only a few,
necessarily highly accurate, master copies are needed).
(This video on EECS143 optical, e-beam, & xray technology (5 min)
is not yet available)
Photomasks (Oldham, 1977, 1991)
A photomask is (typically) a 5 inch glass plate that has a pattern
of clear and opaque areas, repeated over its surface, that defines
a single layer of a ciruit. Between 15 and 20 masks are commonly
used today to describe an entire circuit.
A photomask
Photomasks are typically generated from circuit designs laid out with
the aid of CAD tools. The transfer of the circuit design to the
photomask is typically done by scanning a computer-controlled
optical or electron beam across a photographic plate in the given
(generally ten-fold enlarged) pattern for a layer of the circuit.
This pattern, called a reticle, is then checked for correctness,
and a reduced version of it is reproduced and (repeatedly) projected
side by side on a final mask. A series of reproduced masks, called
submasters, are then created and sent to a wafer fabrication
laboratory where they are often used to produce thousands of wafers
per week.
(This video on EECS143 optical, e-beam, & xray technology (5 min)
is not yet available)
(This video on EECS143 photomask demo (3 min)
is not yet available)
Etching (Oldham 1977, 1991; Maly 1987)
After the photolithographic step, the material areas of the wafer
unprotected by the hardened photoresist are removed in a process
called etching. Etching techniques are characterized by their
selectivity (what materials the etching agent attacks; for instance,
an etching agent should dissolve silicon oxide but not silicon or
photoresist) and degree of anisotropy (the tendency to etch in one
direction only, in contrast to undesired "isotropic" etching
simultaneously in all directions). Etching can be either physical
or chemical, or a combination of both.
Etched surface (from scanning electron microscope)
Physical etching involves bombarding a wafer with high-energy ions
that chip off materials, which is highly anisotropic but unselective.
Chemical etching is done in either a liquid (wet) or gas (dry, or
plasma) environment in which chemicals are used to dissolve selected
material. In wet chemical etching, the wafer is placed in a highly
selective but isotropic liquid chemical that dissolves an exposed
surface material such as oxide. However, such isotropic etches result
in a pattern that significantly departs from the desired pattern. In
dry etching, the wafer is bombarded with a highly selective gaseous
chemical that dissolves certain (exposed) surface materials. Dry
chemical etching combines the advantages of physical and wet chemical
etching in that it is both highly anisotropic and highly selective.
Review the student CMOS example:
etch exposed nitride
Methods of Doping (Ion Implantation) (Picraux & Peercy, 1985; Oldham 1977).
To create active circuit elements such as transistors, impurities
(e.g., used to create n-type and p-type transistor regions) must be
selectively introduced. Two commonly used doping techniques are
diffusion and (more commonly) ion implantation.
In diffusion, the wafer surface is exposed to an impurity (such as
boron or phosphorus) in a high ambient temperature (such as 1000
degrees) and the impurity enters the silicon wherever the
photolithographic process has left it unprotected. Under this heat,
the impurities diffuse slowly into the bulk of the wafer. The depth
to which the impurities diffuse is determined by temperature, and the
amount of time the wafer is kept at the temperature. Two heat
treatments, one at a "deposit" temperature (at which the control of
the amount of impurity introduced is best) and another at a (usually
higher) "diffusion drive-in" temperature (at which most the impurity
is diffused) are generally used. For example, a one micrometer deep
layer of phosphorus can be diffused in about one hour at 1100 degrees
fahrenheit.
Ion implantation
In ion implantation, impurities are introduced into unprotected ares
of the wafer at room temperature by accelerating dopant ions (atoms
stripped of one or more of their electrons) to a high energy so they
are driven into the wafer and become embedded. The depth at which the
dopant ions become embedded depends on their mass and (accelerated)
energy. As the dopant ions plow into the silicon they can damage the
crystal. However, some of this damage can be healed in a moderate-heat
treatment process called annealing. Ion implantation allows more
accurate control of dopant level, can be used to introduce impurites
through an oxide layer if desired, and can be used to introduce
impurities that are difficult to deposit from a high temperature vapor.
Deposition of Thin Films (Oldham 1977, 1991; Maly 1987)
The uppermost layers of IC's consist of deposited thin films, such
as aluminum to form metal contacts between device elements. Two
common methods of deposition are evaporation (otherwise known as
physical vapor deposition, or PVD) and chemical vapor deposition
(CVD). PVD is often used to deposit metals such as aluminum, and
CVD is often used to grow oxides and polycrystalline silicon
(which is then doped to act as a metal)
Deposition of metal
Evaporation, the simplest method, is done by heating the material
to be evaporated (usually aluminum) in a vacuum by bombarding it
with high-energy electrons, and placing the wafers to be coated
above the material. The wafers are usually rotated as the aluminum
evaporates to ensure uniform coverage. The rising (evaporating)
pure aluminum typically is deposited on the wafer to a thickness of
a half to one micrometer. In a method similar to evaporation, called
sputtering, the wafers are place below the material to be deposited.
The material is then bombarded with ions that scatter the atoms,
which fall in a "rain" onto the wafers. Sputtering of alloys is
easier than evaporation because of the different evaporation rates of
different elements. Silicon-aluminum alloys are often used as a metal
source because they prevent the silicon in the wafer from reacting with
the deposited aluminum (which can cause spiking, or short circuits).
In chemical vapor deposition, the deposited material is a product of a
chemical reaction (in a vapor) on the surface of the wafer substrate.
For example, polycrystalline silicon can be grown on the surface of a
wafer by decomposing silane gas (SiH4) in the presence of the wafer.
Review the student CMOS example:
deposit polysilicon
Stage 2: Wafer Probe and Sorting
Review the basic stages of IC manufacturing
In the second stage of wafer manufacturing, each die on a fabricated
wafer is tested for functionality. The dice that fail are marked
with an ink spot. The wafer is then sectioned into individual die by
scribing lines between the dice and breaking the wafer along these
lines. The defective dice are discarded, and the remaining dice are
usually sent from the fabrication facility to a die bank inventory.
Die lots will be withdrawn from the inventory and assembled when
they are scheduled for release.
The wafer probe and sorting stage generally takes from a couple of
hours up to 2 weeks to complete.
Photo of a circuit test
Effect of circuit size on yield
Stage 3: Chip Assembly
In the third stage of wafer manufacturing, die that have been
fabricated and tested are assembled for product release. An
inventory, called a die bank, of tested die is usually maintained
at the assembly plant to smooth out variations in productivity at
the wafer fabrication stage. The assembly stage typically takes a
few days to several weeks to complete.
Review the basic stages of IC manufacturing
Individual integrated circuit die can be mounted in a wide variety
of packages. A chip generally assembled by placing it on a (commonly
lead) frame, attaching electrical leads to it at contact points (for
connections to the outside world), and sealing the assembly in a
(commonly plastic or ceramic) protective housing.
Chip assembly
Two common packages made for mounting into holes in printed-circuit
boards are the dual-in-line (DIP) and pin-grid array (PGA) packages.
The popular and cheap DIP package, commonly made of plastic, epoxy,
or ceramic, accomodates between 4 and 80 leads. The (more expensive)
PGA package, on the other hand, can have hundreds of pins. Recently
developed "surface mount" packages (such as leadless chip carrier, or
LCC packages) allow the package to be directly soldered to the surface
of a printed-circuit board.
Die-mounting and wire-bonding is labor intensive and expensive. In
fact, the cost of assembly and test can be many times the cost of
the fabrication of a small die. In addition, the failure of wire
bonds is one of the most common IC reliability problems.
Stage 4: Chip Test and Burn-in
Review the basic stages of IC manufacturing
In this final stage, packaged chips are subjected to an extensive
series of electrical tests and burn-in operations to ensure that
the circuit functions correctly and will continue to do so reliably.
(For example, they may be operated for several hours in a high-
temperature environment).
Final testing and burn-in usually take 1 to 7 days (although burn-in
can take up to 5-6 weeks) and are usually done at the assembly plant
where chips are packaged (stage 3). After final test, chips are
sorted into different bins based on attributes like device speed
and power consumption (Harrison et al, 1989; Oldham, 1991).
Chip sort photo
Software Systems for IC Manufacturing
The IC manufacturing process is a complex process in which design and
fabrication are currently done independently. The fabrication process
alone involves hundreds of steps, resulting in turnaround times of
several months. As device and process complexity increase and product
lifetimes shrink, the manual steps involved become so cumbersome and
labor intensive that more effective, automatic methods to collect and
monitor processing data are essential.
Computer-integrated manufacturing (CIM) systems integrate many
software packages, such as: computer-aided design (CAD) and
computer-aided manufacturing tools (e.g., work-in-progress, or WIP,
systems); process simulators, facility management systems like those
used to help operate the Berkeley Microfabrication Laboratory, and
production control and order entry systems. CIM emphasizes the
integration of these systems, aided by a shared integrated database
and a formally specified process flow representation, as the key to
dramatic productivity improvements. Such improvements will allow IC
manufacturers to respond quickly in today's increasingly competitive
environment of more complex and customized IC's with shorter life
cycles (Hegarty 1991; Bray 1988; Harrison et al 1989).
Integrated Software Systems for IC manufacturing
The objective of CIM is to automate the complex manufacturing process
to improve flexibility and portability, and product quality and
consistency; to permit application-specific chip development; and
to minimize turnaround time, scrap and rework, development and
manufacturing costs, confusion, and human error (Penfield, 1989).
Computer-aided Design
Prior to the advent of sophisticated computer-aided circuit design
(CAD) systems in 1978, IC device design was often done by device
experts by drawing circuit layouts completely by hand. CAD systems
allow designers to simulate the operation of a circuit, and to
determine the most space-conserving layout of each layer of the
integrated circuit.
Simulation is less expensive and more accurate than assembling and
testing breadboard circuits made of discrete circuit elements.
Simulation also allows the designer to modify a circuit by a few
keystrokes, and immediately observe the resulting behavior of the
circuit. Circuit layout is also computer-aided, with the help of
formally specified design rules which specify the physical contraints
on circuit geometries imposed by physics and patterning processes
(Oldham, 1977; Elliot, 1989).
Photo of a CAD circuit layout
Design abstractions allowed free-form layout to give way to automatic
design and circuit testing, and as a result, IC process design was
revolutionized. New architectures (e.g., RISC) were developed, rapid
prototyping ensued, and design became accessible to a broader range
of people--chemists, physicists, computer scientists--not just
device experts. As function and layout abstractions revolutionized
the design process in 1978, abstraction of the manufacturing process
with a process flow language and computer-integrated manufacturing
can revolutionize the fabrication process, allowing new structures
and designs, rapid prototyping of structures, and process design by
circuit engineers--not just fabrication experts--to facilitate the
development of more application-specific chips (Penfield, 1989).
Shop Floor Control with Work-in-Progress (WIP) (Hegarty, 1991)
A process-flow is a specification of the steps needed to manufacture
a product. Traditional shop floor control is usually specified in a
structured document system in which a printed copy of the process-flow
specification, called a traveller, accompanies a wafer lot as it moves
between different fabrication equipment. Equipment operators follow
the instructions on the traveller to process the wafer lot. Although
computer systems are often used to store the traveller specifications
they cannot interpret them, nor can they automatically collect process
data during a run.
Run-sheet systems employ -interactive- travellers to track work-
in-progress (WIP) and automate some of the equipment operations.
However, they are usually limited to a small, fixed set of
sequentially executed commands. WIP systems control and record
the movement of wafer lots through a fabrication facility, issue
instructions to people and equipment to execute steps to process the
lots, allocate resources (i.e., equipment), and maintain a log of
the processing history of wafer products. Examples of commercial
run-sheet systems are PROMIS, WIPSYS, and WORKSTREAM (Harrison
et al 1989).
Integrated Software Systems for IC manufacturing
In addition to keeping track of currently active wafer lots, some
WIP systems also contain up-to-date information on production lots
in different stages of the manufacturing process--fabricated wafer
lots stored in the die bank (prior to final assembly), lots in
the assembly plant, lots firmly scheduled for future release, and
tested chips in the finished goods inventory.
Review the basic stages of IC manufacturing
Input commands to WIP systems can be entered directly by fabrication
engineers, received from a WIP interpreter that executes a process flow
program, or from production control systems requesting projected die
supplies for customer orders (Rowe et al 1990; Harrison et al 1989).
Process Simulation Systems (Rowe et al 1990)
Process simulators are used to produce wafer profiles at different
stages of the fabrication process. Producing and testing simulated
profiles is less expensive than fabricating and testing the wafers
themselves. Simulation allows a process engineer to easily modify
the fabrication process and observe the resulting two-dimensional
cross-section (or less commonly) three-dimensional sideview of the
wafer, called a wafer profile, at various steps of the process.
A sample wafer profile
The input commands to process simulators can be entered directly
by fabrication engineers or received from a simulation interpreter
that executes a process flow program. Examples of process simulators
are PROSE, SIMPL, and SUPREME. Factory simulators (such as BLOCS,
CHIPS, and MODES) and simulators that check generated wafer profiles
and process correctness (such as the Funokoshi system) can also be
given commands directly or through input-generator interpreters
executing process flow programs.
Order Entry and Production Control Software Systems
Order entry systems (such as SWISS; see Harrison et al, 1989) operate
on a database of booked (but not yet delivered) customer orders and
quote guides to track the status of customer orders. Based on this
information, order entry systems request price quotes and delivery
schedules from production control systems.
Production control systems further automate the mechanics of doing
business by generating delivery quotations based on product
availability information from inventory and WIP systems, and by
generating time-phased production requests for WIP systems once a
quotation is accepted and a customer order is booked.
Integrated Software Systems for IC manufacturing
Shared Integrated Databases (Hegarty, 1991)
A key component of a CIM system is a shared database that stores
all of the information about the design and manufacture of
semiconductors. Such a database may contain information about the
facility areas and equipment, process-flow specifications, work-in-
progress (WIP), equipment status, and product inventory and orders.
This information can be used by multiple CIM software applications
for tasks such as equipment control, circuit design, process
simulation, process specification, fault diagnosis, and operations
monitoring.
For example, BPFL, a process-flow specification language, uses two
main kinds of database entities. The first kind includes entities
required to implement a BPFL program (such as process flows, wafer
snapshots and lots), and the second includes entities a BPFL program
might access (such as equipment and mask descriptions).
The Berkeley Microfabrication Laboratory (Dunster, 1987).
The Berkeley Microfabrication Lab in Cory Hall is a complete facility
to fabricate semiconductor devices and circuits.
Microelectronics research began at the Berkeley lab, the first
university IC lab in the world, in 1960. The first working
silicon-based circuits were produced in 1962. Expansion and
renovation of the now 10,000 square feet lab was completed in
1983. The lab currently supports 160 Berkeley students, faculty,
and staff from EECS (about 75% of the users) and physics, material
science, chemistry, and chemical engineering (about 25% of the
users). A broad range of undergraduate courses at Berkeley--in
device physics, fabrication technology, circuit and systems design,
and computer aided design--provides the fundamental basis for
advanced research. Students are expected to carry out all
fabrication steps from design to testing experimental devices,
with the exception of a few highly specialized steps such as
ion implantation.
(The following five videos,
History of the Microlab (2 min),
Overview (2 min),
Equipment (9 min),
Lab control (1 min), and
Access and users (3 min), are not yet available)
The Microlab contains over 60 different kinds of equipment, and is
a test site for Berkeley's Computer Integrated Manufacturing (CIM)
projects. The following software systems and languages are available
to aid in the fabrication process:
1. The WAND, to reserve and control equipment, and report problems.
2. Circuit design software (e.g. KIC, MAGIC).
3. Process simulation software (e.g., SAMPLE, SUPREM, SPICE, BIPS).
4. Berkeley Process Flow Language (BPFL), used to specify the steps
needed to manufacture a project. BPFL programs are evaluated by
simulation and fabrication interpreters.
5. Faults to record and diagnose equipment problems.
6. BLIMP and CIM Browser to monitor the operation of the microlab.
The WAND
The WAND is a menu-driven interface to the Berkeley Laboratory
Information System (BLIS) for managing the operation of the
Berkeley Microlab. Users can enable and disable lab equipment
through the system, which checks user's authorization level on
each piece of equipment. Using the system, users can post
equipment problems and comments, which go directly to the facility
technicians and management so they can be addressed quickly. Users
can also inquire about and reserve pieces of equipment through the
the online equipment status board (Dunster, 1987).
Berkeley Process-Flow Language (BPFL) (Hegarty, 1991; Rowe et. al., 1990)
A process flow is a specification of the steps needed to fabricate a
product. The BPFL language was developed for specifying process flows.
BPFL specifys all aspects of a process, including instructions to make
IC's, the structures created during fabrication, or the movement of
material through a semiconducture manufacturing facility. A formal
process-flow representation, provided by BPFL, is an important part of
an IC computer-integrated manufacturing (CIM) system.
Review the basic stages of IC manufacturing
Review the student CMOS example:
deposit polysilicon
Example of a process flow
A BPFL program is composed of procedural and object-oriented
abstractions, data and control structures, and exception handlers.
BPFL programs are evaluated by interpreters that perform tasks like
work-in-progress (WIP) tracking and process simulation.
Processes for fabricating bipolar and MOS transistors can be
specified in BPFL. For example, BPFL specifications are available
for Student CMOS, a simple CMOS process used in EECS 143, "Processing
and Design of Integrated Circuits", and CMOS-16, the baseline CMOS
process used in the Berkeley Microlab.
Faults (Mudie, 1990)
Faults combines a forms-based user interface with a facility-wide
relational database to record equipment maintenance and repair events
as they occur. The semantics of preventive maintenance (PM) and
repair events are formalized to create clear and unambiguous
maintenance reports.
Storing PM and equipment failure information in an organized database
has several benefits. Accumulated information is automatically
indexed to aid diagnosis of failures as they occur. Equipment
failure information is available to utility programs for display
and statistical analysis, to produce summaries such as preventive
maintenance intervals, mean time between failures, predicted
downtimes, performance trends, etc.
Faults is in common use at the Berkeley Microfabrication Facility.
Lab technicians have entered knowledge of over a hundred different
pieces of equipment into the database. The Faults system has
provided a significant improvement in the management of preventive
maintenance and equipment repair information.
Operation of the Microlab
A key component of any CIM system is a shared integrated database
that stores all of the information about the design and manufacture
of a product (such as semiconductors). Berkeley Microlab users have
access to an online database that contains information about the
Microlab facility, including equipment, utilities and work-in-progress
(WIP). The BLIMP and CIM Browser systems operate on this database.
The Berkeley Laboratory Infrastructure Monitoring Program (BLIMP III)
provides for real-time sensor monitoring within the Microfabrication
Lab. At present, there are nineteen sensors located throughout the
Microlab. These sensors monitor things such as storage tank levels;
air, liquid nitrogen, and oil pressures; and air temperatures. The
BLIMP software interacts with the data acquisition device, processes
and displays sensor readings, saves the history of readings within
a database for future examination, and performs the appropriate
actions (i.e., sending out alarm notices) for the necessary
conditions (i.e., temperature too high, storage tank level too low).
In addition, BLIMP can also provide sensor data to external
applications, including the the CIM Browser.
CIM Browser (Smith and Rowe, 1990) is an graphical interface that
allows end-users to specify queries to the database.
A sample window from the CIM Browser
The evolution of IC technology illustrates the constant interaction
between technology and economics, resulting in more reproducible, more
reliable, and less expensive devices (Noyce, 1977). Advances in IC
technology are driven mainly by economic desires for high yield and
cycle time, mass fabrication at low cost, and shares in high-volume
electronics markets. Competition in international markets is high.
In the past 30 years, chip packages have remained fairly constant in
size and price (about $5 per chip), but the number of transistors per
chip have increased by six orders of magnitude, doubling every year or
two, to the point where today a typical chip contains 10^6 transistors.
(In 1960, a "chip" was a 1/2 inch wafer containing one transistor).
Economics of IC manufacturing, 1970 and 1990
The most striking characteristic that separates the IC industry from
other industries is in its annual doubling of output. This rapid
growth has resulted in a greater rate of price reduction (where price
in the IC industry is measured per bit) than in other industries
(Noyce, 1977).
Yield
Yield is the percentage of good circuits (that is, individual die)
that survive the manufacturing process to emerge as packaged chips.
Review the basic stages of IC manufacturing
Twenty years ago, IC chip yields were at 20%, which left enormous
leverage for profit potential. In the 1980's, a large percentage of
the chip market share was taken over by Japanese IC manufacturers,
who concentrated on yield. As fabrication technology matured, yields
increased to the point where commercial yields for simple circuits
are presently at a stable 75-80% at competitive IC manufacturing
firms.
Effect of circuit size on yield
Yield typically decreases with increasing circuit size and
integration because bigger circuits have a higher probability of
having a defect (i.e., more can go wrong with them) and because
fewer (large) die can fit on a single wafer (Oldham, 1991, 1977).
Thus, typical commercial yields currently vary from as low as 30%
to as high as 80%, depending on the complexity of the circuit, the
maturity of the process, and the efficiency of the fab.
Cycle Time
Cycle time is the elapsed time required to produce a chip. Overall cycle
times, as well as the cycle times of each stage of the manufacturing
process, are both important measures of manufacturing efficiency.
Review the basic stages of IC manufacturing
Typical commercial fabs require between 30 - 70 days cycle time,
depending on the complexity of the circuit.
IC manufacturing lines can be categorized by the number of wafers that
are started per week (typically 5,000 to 10,000), and by the variety
of products manufactured and processes used. A high volume line that
produces commodity memory products (DRAM`S) might start up to 25,000
wafers per week and only use one process. A low volume line that
produces a variety of products might start 1,000 to 5,000 wafers per
week. A research and development (R&D) line that is used to develop
new products and processes might start 500 wafers per week and use
different processes for each lot.
Comparing Japanese and United States IC Industries (Longfellow et al 1991)
(Note the following information is somewhat dated, and the situation
continues to change rapidly)
Currently, US firms hold 36% of the world IC market share, and
Japanese firms hold 52%. Since 1985, Japan has been ahead of the
US in production and in research and development (R&D) investments.
R&D investment is currently the most significant indicator of
future performance, and the gap in R&D spending between the largest
Japanese and US semiconductor suppliers is increasing. Also
increasing is the gap between investment in equipment in Japan and
the US.
World IC production by region
IC R&D spending
IC equipment spending
There are four key causes of the declining market share of US IC
companies. First, US capital expenses, such as for facilities and
workers, are higher than foreign capital expenses. Thus businesses
are less willing to invest, and consequently have shorter planning
horizons. Second, more final products such as display systems and
disk drives are made outside of the US, and these products use fewer
US components. Third, less emphasis has been placed on manufacturing
(compared to innovative design) in the US, so US manufacturing
quality suffers. Japanese firms have tended to focus more heavily
on manufacturing and yield. Fourth, a tighter coupling between
final product makers and local (and inhouse) IC manufacturers has
allowed Japanese firms to have access to the latest technology. As a
result, Japanese firms have a stronger influence over the direction
of technology development.
In order for the US semiconductor industry to remain competitive in
the worldwide markets, it must increase its participation in projected
critically important high-volume markets, and increase R&D funding.
The role of academic research could also be strengthened, support for
students and education increased, and incentives such as reduced IC
manufacturing equipment depreciation schedules could be introduced.
Mass IC Production and Cost
Today, a competitive IC manufacturing facility produces 3000 wafers
per week at a cost of $750M (where $500M is for equipment alone).
Fabrication of the small planar features that characterize IC's
requires complex equipment that changes quickly as technology
advances. Thus, IC equipment becomes rapidly obsolete. Equipment
costs have risen 100 times their cost 30 years ago, and equipment
lifecycles are typically no more than three years in length
(Moore, 91).
Economics of IC manufacturing, 1970 and 1990
The uncommonly short lifespan of IC facilities and equipment, coupled
with extraordinarily rapid change in technology and products, has
resulted in exceptionally high costs for remaining competitive with
Japanese firms in the international market. The typical lifespan for
a fabrication line is 5 to 10 years, of which only less than 5 will
be years during which the line is at the leading edge.
Trends in 1994
While the Japanese concentrated on RAM during the eighties, US
companies, most notably Intel, concentrated on microprocessors,
and the balance is now (as of 1994) shifting in the favor of the
US. Microprocessor speed and transistor
density continue to grow at an exponential rate, as demonstrated
in the following graph:
Microprocessor Trends
Microprocessor design is also rapidly evolving, with key trends
described here. (not avaliable)
A market forecast for microprocessors (and their cousins, microcontrollers
and digital signal processors), is available
here
As costs increase, however, companies are increasingly unable to
develop new products on their own, and both national and
international collaborations are becoming common.
More attention is also being paid to applying manufacturing science
concepts to the production line, in order to reduce costs as much
as possible.
High Volume Electronic Markets
Four emerging markets show potential for high growth and strong
influence in determining future technologies used in several major
products. These markets are consumer electronics, broadband
communications, advanced display systems, and intelligent vehicles
and highway systems.
Broadband Communications
Broadband Integrated Services Digital Network (ISDN) transmissions
will allow a single optical fiber connection to transmit digital
video signals, telephone conversations, and data simultaneously to
end users. The demand for electronic and optoelectric components
(such as lasers, amplifiers, and advanced high-speed IC's to implement
signal processing and communications algorithms) along with equipment
to digitize, code, transmit, receive, and decode data at high speed
frequencies will be served by IC manufacturers. Also in demand will be
a wide-range of consumer products such as cellular phones, high-
definition video receivers and video recorders, plus many new products
that have no equivalent today.
The expanded array of serviced available through broadband networks
will reduce the time and expense of traveling to collect information,
increase in the range of educational and entertainment materials
available, and diminish the need for workers to be physically located
together at a common workplace. Access to video services, information
databases, electronic mail, and computer networks through a single
seamless network will be possible. As a result, and increasing number
of workers will soon have the option of exchanging work and ideas from
home.
Advanced Display Systems
Advanced Display Systems (ADS) require advanced sensors and displays,
memories (to store images), image processors, and display drivers.
Flat panel human-machine interface displays will eventually replace
much of todays cathode ray tube (CRT) technology, and will do so
reliably, using much less power, and in smaller packaging. The
demand for ADS for computers, workstations, and televisions will
challenge the US IC industry. If this challenge isn't met, lighter,
fully assembled TV's, computers and workstations will be shipped
from overseas (and thus will be made of fewer US produced IC
components). These systems will replace US products, adversely
affecting US jobs and sales (Longfellow et al, 1991).
Intelligent Vehicle and Highway Systems
Intelligent Vehicle and Highway Systems (IVHS) refers to new
technologies that will greatly increase highway and automobile
efficiency and safety. IVHS electronics will require microprocessors,
signal processors, and memories embedded in automotive controls and
communications systems, as well as IC components for satellite
receivers, sensors, radar-based collision-avoidance systems, and
distributed highway control systems. Major IVHS projects are
currently underway in Europe and Japan, and US firms are in a good
position to serve the projected demand for IC components.
Consumer Electronics
A wide range of consumer products, such as camcorders, high-
definition video receivers and video recorders, high-definition
television (HDTV), cellular phones, facsimile machines, personal
computers, plus many new products that have no equivalent today,
will be in high demand in the near future. These next-generation
products will require new chips. The impact on US electronics firms,
and the IC manufacturers who supply them, will be great as long as
US firms remain competitive by contributing to the advancement of
chip design, packaging, software, and manufacturing technologies.
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Modified for Mosaic by Taku Tokuyasu / tokuyasu@cs.berkeley.edu